Google is a leading technology company that specializes in AI and infrastructure solutions. The Hardware Design and Integration Engineer will work on shaping the future of AI/ML hardware acceleration, specifically focusing on the design and integration of digital logic blocks within Tensor Processing Units (TPUs). This role involves collaborating with cross-functional teams to develop innovative hardware solutions that power Google's AI applications.
Define and document the microarchitecture for digital designs within the TPU
Write high-quality, performant, and power-efficient Register Transfer Level (RTL) code, primarily in SystemVerilog
Collaborate with partner teams to support integration efforts and with the Verification team to develop test plans, debug RTL, and ensure functional correctness
Work closely with the Physical Design team to meet timing, area, power, and manufacturability requirements
Contribute to the development and enhancement of design tools, flows, and methodologies, and support post-silicon validation and debug efforts
Qualification
Required
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience
2 years of experience in RTL design
Experience with digital design and microarchitecture design
Experience in design, optimizing for performance, power, and area
Experience with cross-functional engagement with Design Verification and Physical Design teams
Preferred
Master's degree or PhD in Electrical Engineering, Computer Engineering, or a related field
4 years of RTL design experience
Experience with Linting, CDC, RDC, LEC
Experience with Scripting languages (i.e. Python or Perl)
Experience architecting RTL solutions and experience with ASIC Synthesis flows
Experience with flow development and methodology improvements, and Integration experience
Benefits
Bonus
Equity
Benefits
Google specializes in internet-related services and products, including search, advertising, and software. It is a sub-organization of Alphabet.