Formal Verification Engineer

Austin, TX

Full-time

Hybrid

$119K/yr - $178K/yr

New Grad, Entry Level

AMD is a company dedicated to building innovative products that enhance computing experiences across various sectors. They are seeking a passionate Formal Verification Engineer to join their GFXIP Formal Verification team, where the role involves applying formal techniques to verify complex GPU designs and collaborating with design teams to develop verification requirements.

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Responsibilities

Drive formal verification execution with support from FV tech leads for GFX-IP blocks
Collaborate with design and architecture teams to understand design specifications and develop verification requirements
Utilize formal techniques to build comprehensive testbenches, striving for better convergence of formal proof
Debug testbench and/or design issues using formal tools and provide feedback for design improvements
Responsible for verification quality metrics like pass rates, code/functional coverage and proof convergence
Document formal verification processes, findings, and best practices
Continuously learn and stay abreast of advancements in formal verification and related technologies

Qualification

Required

Passion for modern, complex processor architecture, digital design, and verification
Excellent communication skills
Strong analytical and problem-solving skills
Willingness to learn and take on problems
Drive formal verification execution with support from FV tech leads for GFX-IP blocks
Collaborate with design and architecture teams to understand design specifications and develop verification requirements
Utilize formal techniques to build comprehensive testbenches, striving for better convergence of formal proof
Debug testbench and/or design issues using formal tools and provide feedback for design improvements
Responsible for verification quality metrics like pass rates, code/functional coverage and proof convergence
Document formal verification processes, findings, and best practices
Continuously learn and stay abreast of advancements in formal verification and related technologies
Undergrad degree required

Preferred

Good understanding of computer organization/architecture
Knowledge of scripting languages such as Python or TCL
Internship or project experience in digital design or verification
Experience or familiarity with formal tools and/or functional verification tools from Synopsys, Cadence or Mentor Graphics
Bachelors or Masters degree in computer engineering/Electrical Engineering preferred